Written by leading experts in the field, Design of Cost-Efficient Interconnect Processing Units: Spidergon STNoC comprehensively examines the current state-of-the-art and future trends in multiprocessor system-on-chip (MPSoC), in particular network-on-chip (NoC) design.
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Written by leading experts in the field, Design of Cost-Efficient Interconnect Processing Units: Spidergon STNoC comprehensively examines the current state-of-the-art and future trends in multiprocessor system-on-chip (MPSoC), in particular network-on-chip (NoC) design.
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Add this copy of Design of Cost-Efficient Interconnect Processing Units: to cart. $179.18, new condition, Sold by Booksplease rated 4.0 out of 5 stars, ships from Southport, MERSEYSIDE, UNITED KINGDOM, published 2008 by CRC Press.
