System Synthesis with VHDL
Petru Eles,
Krzysztof Kuchcinski
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System-on-Chip Methodologies ...
Peter J. Ashenden (Editor),
Jean Mermet (Editor)
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Verilog: Frequently Asked...
Shivakumar S. Chonnad,
Needamangalam B. Balachander
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Verilog and SystemVerilog...
Stuart Sutherland,
Don Mills
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SystemVerilog for...
Chris Spear
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Assertion-Based Design
Harry D. Foster,
Adam C. Krolnik
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Hardware Verification with...
Mike Mintz,
Robert Ekendahl
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Writing Testbenches using...
Janick Bergeron
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Languages for Embedded...
Martin Radetzki (Editor)
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Optimized ASIP Synthesis from...
Oliver Schliebusch,
Heinrich Meyr
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Circuit Design and Simulation...
Volnei A Pedroni
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Digital Design with Rtl...
Frank Vahid
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FPGAs 101: Everything You...
Dr. Gina Smith
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Advanced Digital Design with...
Michael Ciletti
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Computer Arithmetic and...
Joseph Cavanagh
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C Compilers for ASIPs:...
Manuel Hohenauer,
Rainer Leupers
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Languages for Embedded...
Martin Radetzki (Editor)
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Digital System Designs and...
Ming-Bo Lin
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The Verilog(r) Hardware...
Donald Thomas,
Philip Moorby
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Digital VLSI Design with...
Professor John Williams,
Don Thomas (Foreword by)
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FPGA Prototyping by Verilog...
Pong P Chu
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Digital Design and Verilog...
Joseph Cavanagh
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The Designer's Guide to VHDL:...
Peter J Ashenden
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The Student's Guide to VHDL
Peter J Ashenden
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